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Low complexity encoding of improved regular LDPC codes
The existing encoding scheme for LDPC codes usually incurs too high complexity and should be changed to a low complexity encoding scheme. However, little consideration has been given to the LDPC encoder VLSI implementation. We consider low complexity encoding of regular LDPC codes, and we propose a...
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Main Authors: | , |
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Format: | Conference Proceeding |
Language: | English |
Subjects: | |
Online Access: | Request full text |
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Summary: | The existing encoding scheme for LDPC codes usually incurs too high complexity and should be changed to a low complexity encoding scheme. However, little consideration has been given to the LDPC encoder VLSI implementation. We consider low complexity encoding of regular LDPC codes, and we propose a pivoting and bit-reverse (PABR) algorithm to rapidly construct the parity-check matrix (PCM). And we consider improved regular LDPC codes in BER performance. We propose that the PCM is constructed with sub-matrixes which are made up of Costas arrays. The codes have sparse PCMs. They are designed to perform well when iteratively decoded with the sum-product decoding algorithm and to allow low complexity encoding. We show an approach to implementing the LDPC encoder using the PABR algorithm and improving BER performance using a PCM with Costas arrays. This paper then describes an FPGA implementation of regular LDPC encoder on a hardware platform for 4G mobile communication systems. |
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ISSN: | 1090-3038 2577-2465 |
DOI: | 10.1109/VETECF.2004.1400513 |