A scalable dual-clock FIFO for data transfers between arbitrary and haltable clock domains : Systems-on-chip

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Bibliographic Details
Published in:IEEE transactions on very large scale integration (VLSI) systems 2007, Vol.15 (10), p.1125-1134
Main Authors: APPERSON, Ryan W, ZHIYI YU, MEEUWSEN, Michael J, MOHSENIN, Tinoosh, BAAS, Bevan M
Format: Article
Language:English
Subjects:
Applied sciences
Design. Technologies. Operation analysis. Testing
Electronics
Exact sciences and technology
Integrated circuits
Integrated circuits by function (including memories and processors)
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Online Access:Get full text
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ISSN:1063-8210
1557-9999