Impact of porous SiOCH on propagation performance measured for narrow interconnects of the 45 nm node

With the dimensions scaling down at each new technology node, introduction of porous dielectric materials is required to reduce the interconnect capacitance. Nevertheless, these materials are very prone to damage during integration, thus increasing their K-value (2.5 as deposited for the 45 nm node)...

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Bibliographic Details
Published in:Microelectronic engineering 2007-11, Vol.84 (11), p.2744-2749
Main Authors: Gallitre, M., Blampey, B., Fléchet, B., Farcy, A., Arnal, V., Bermond, C., Lacrevaz, T., Torres, J.
Format: Article
Language:English
Subjects:
45 nm node
Applied sciences
Design. Technologies. Operation analysis. Testing
Electronics
Exact sciences and technology
HF measurements
Integrated circuits
Interconnects
Propagation
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
ULK degradation
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Summary:With the dimensions scaling down at each new technology node, introduction of porous dielectric materials is required to reduce the interconnect capacitance. Nevertheless, these materials are very prone to damage during integration, thus increasing their K-value (2.5 as deposited for the 45 nm node) in the final circuit. In order to characterize these effects, high-frequency measurements and electromagnetic simulations were carried out on specific microstrip structures. Taking into account typical circuit characteristics, time-domain extraction of delay values and crosstalk levels were then performed, enabling a precise analysis of moisture uptake effects from a performance point of view.
ISSN:0167-9317
1873-5568
DOI:10.1016/j.mee.2007.05.034