Design methodology of body-biasing scheme for low power system LSI with multi-Vth tTransistors

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Bibliographic Details
Published in:IEEE transactions on electron devices 2007, Vol.54 (11), p.2946-2952
Main Authors: YASUDA, Yuri, AKIYAMA, Yutaka, YAMAGATA, Yasushi, GOTO, Yoshiro, IMAI, Kiyotaka
Format: Article
Language:English
Subjects:
Applied sciences
Design. Technologies. Operation analysis. Testing
Electronics
Exact sciences and technology
Integrated circuits
Integrated circuits by function (including memories and processors)
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Transistors
Online Access:Get full text
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ISSN:0018-9383
1557-9646