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Routing in general junctions

A junction is a union of channels. The L-, S-, T-, and X-shaped junction routing problems arise while generating a feasible routing order of channels for the building-block layout strategy. The authors present lower and upper bounds on the widths of the channels of general junctions. In addition to...

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Published in:IEEE transactions on computer-aided design of integrated circuits and systems 1989-11, Vol.8 (11), p.1174-1184
Main Authors: Maddila, S.R., Zhou, D.
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Language:English
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description A junction is a union of channels. The L-, S-, T-, and X-shaped junction routing problems arise while generating a feasible routing order of channels for the building-block layout strategy. The authors present lower and upper bounds on the widths of the channels of general junctions. In addition to the trivial lower bounds provided by the channel densities, they establish nontrivial existential lower bounds by properly arranging nets which require excessive number (i.e. more than the density) of crossings at a set of chosen cuts. To establish the upper bounds the authors first develop a router for the L-junction, and then they show how to use this router for routing general junctions. For the two-terminal net L-, S-, T-, and X-junction routing problems, the authors' routers generate solutions matching the lower bounds; hence, they are optimal. For the three-terminal net case, their router generates solutions matching the existential lower bound for the L-junction. All lower bounds are valid for both the knock-knee and the Manhattan routing models, while the upper bounds are only valid for the knock-knee routing model. However, all the routing solutions are three-layer wireable.< >
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ispartof IEEE transactions on computer-aided design of integrated circuits and systems, 1989-11, Vol.8 (11), p.1174-1184
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1937-4151
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source IEEE Electronic Library (IEL) Journals
subjects Applied sciences
Circuit topology
Design. Technologies. Operation analysis. Testing
Electronics
Exact sciences and technology
Integrated circuits
Layout
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Very-large-scale integration
title Routing in general junctions
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