A Resonant Global Clock Distribution for the Cell Broadband Engine Processor

• Published in: IEEE journal of solid-state circuits 2009-01, Vol.44 (1), p.64-72
• Main Authors: Chan, S.C., Restle, P.J., Bucelot, T.J., Liberty, J.S., Weitzel, S., Keaty, J.M., Flachs, B., Volant, R., Kapusta, P., Zimmerman, J.S.
• Format: Article
• Language: English
• Subjects: Applied sciences; Broadband; Capacitors; Circuits; Clock distribution; clock grid; clock tree; Clocks; Copper; Delay; Design. Technologies. Operation analysis. Testing; Dielectric, amorphous and glass solid devices; Electronics; Engines; Exact sciences and technology; Filtering; Filtration; Frequency; inductor; Integrated circuits; Integrated circuits by function (including memories and processors); jitter; Magnetic devices; microprocessor; Microprocessors; Noise reduction; Recycling; Resonance; resonant circuit; resonant clock; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Wiring
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.2008.2007147

Resonant clock distributions have the potential to save power by recycling energy from cycle-to-cycle while at the same time improving performance by reducing the clock distribution latency and filtering out non-periodic noise. While these features have been successfully demonstrated in several small-scale experiments, there remained a number of concerns about whether these techniques would scale to a product application. By modifying the Cell broadband engine processor to incorporate a large resonant global clock network, power savings with full functionality is demonstrated over a 20% range in clock frequencies, and a 6-8 Watt power savings at 4 GHz. This was achieved by changing one wiring level and adding an additional thick copper level to create inductors and capacitors.