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Physical Insights on BJT-Based 1T DRAM Cells
The basic operation of BJT-based floating-body 1T DRAM cells on SOI is analyzed with supportive numerical device simulation. Extreme sensitivity of the charging process (write ldquo1rdquo) to the offset (Delta t WB ) between the word-line and bit-line voltage pulses is revealed and explained. The ne...
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Published in: | IEEE electron device letters 2009-05, Vol.30 (5), p.565-567 |
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Main Authors: | , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | The basic operation of BJT-based floating-body 1T DRAM cells on SOI is analyzed with supportive numerical device simulation. Extreme sensitivity of the charging process (write ldquo1rdquo) to the offset (Delta t WB ) between the word-line and bit-line voltage pulses is revealed and explained. The necessity of a positive Delta t WB for successful write ldquo1rdquo is related to establishing a high gate capacitance, which is the predominant charge-storage element in the BJT-based cell. Such charging underlies why a fully depleted (FD) cell, e.g., a FinFET, can work for BJT-based DRAM, without an independent bias for accumulation charge that is necessary in conventional FD-MOSFET DRAM cells for charge storage and data sensing. Furthermore, a bulk-accumulation effect in the BJT-based DRAM cell is revealed and described. It undermines the BJT operation and leads to ineffective charging and significant loss of sense margin when the cell body thickness is scaled. |
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ISSN: | 0741-3106 1558-0563 |
DOI: | 10.1109/LED.2009.2017285 |