All-Digital Outphasing Modulator for a Software-Defined Transmitter

An all-digital outphasing modulator to be used in a software-defined radio (SDR) transmitter is presented. A digitally-controlled oscillator (DCO) followed by two digital phase rotators (DPR) are the main building blocks. The DCO and DPRs are enclosed, respectively, by a phase-locked loop and two de...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 2009-04, Vol.44 (4), p.1260-1271
Main Authors: Heidari, M.E., Minjae Lee, Abidi, A.A.
Format: Article
Language:English
Subjects:
Applied sciences
Calibration
Capacitive transformer
Chips
Circuit properties
Circuits
Circuits of signal characteristics conditioning (including delay circuits)
CMOS process
Delay
Digital
Digital circuits
Digital filters
Digital signal processing
Digital signal processing chips
Digital signal processors
digitally-controlled oscillator
dynamic range
Electric, optical and optoelectronic circuits
Electronic circuits
Electronics
Exact sciences and technology
Filtering
GSM
Microprocessors
Modulators
noise shaping
Oscillators
Oscillators, resonators, synthetizers
out-of-band emission
outphasing
Phase locked loops
phase rotation
quantization noise
Radio transmitters
Signal convertors
time-to-digital converter
transmitter
Transmitters
WCDMA
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Description
Summary:An all-digital outphasing modulator to be used in a software-defined radio (SDR) transmitter is presented. A digitally-controlled oscillator (DCO) followed by two digital phase rotators (DPR) are the main building blocks. The DCO and DPRs are enclosed, respectively, by a phase-locked loop and two delay-locked loop. All functions, including filtering and calibration are performed in a digital signal processor (DSP). The chip was fabricated in a 90 nm CMOS process and tested for GSM and WCDMA. The total active area of the chip is 3 mm 2 . Semi-analog blocks (DCO core, DPR core and their buffers) and digital processor consume 30 mA and 25 mA, respectively. Current consumption of the phase-to-digital converter is 70 mA, which can be reduced to 30% by gating off the circuit during idle times.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2009.2014729