High-speed and low-cost reverse converters for the (2n-1, 2n, 2n+1) moduli set

In this brief, new architectures are presented for the conversion of residues to binary equivalents in the (2n-1, 2n, 2n+1) moduli set. Both of the architectures presented are based on a new algorithm, which eliminates a multiplication. In the design of the architectures, speed and cost are consider...

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Bibliographic Details
Published in:IEEE transactions on circuits and systems. 2, Analog and digital signal processing Analog and digital signal processing, 1998-07, Vol.45 (7), p.903-908
Main Authors: Premkumar, A.B., Bhardwaj, M., Srikanthan, T.
Format: Article
Language:English
Subjects:
Adders
Applied sciences
Exact sciences and technology
Hardware
High speed optical techniques
Information, signal and communications theory
Miscellaneous
Optical fiber communication
Optical filters
Optical receivers
Optical sensors
Optical transmitters
Prototypes
Signal and communications theory
Synchronization
Telecommunications and information theory
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Summary:In this brief, new architectures are presented for the conversion of residues to binary equivalents in the (2n-1, 2n, 2n+1) moduli set. Both of the architectures presented are based on a new algorithm, which eliminates a multiplication. In the design of the architectures, speed and cost are considered as the principal factors. The proposed architectures use fewer multipliers and adders of smaller size. A comparison in terms of hardware requirements, delay estimates, and complexity is made to establish the advantages of the proposed design.
ISSN:1057-7130
1558-125X
DOI:10.1109/82.700943