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Digital Predistortion for High Efficiency Power Amplifier Architectures Using a Dual-Input Modeling Approach
In this paper, a novel model is proposed for dual-input high efficiency power amplifier (PA) architectures, such as envelope tracking (ET) and varactor-based dynamic load modulation (DLM). Compared to the traditional single-input modeling approach, the proposed model incorporates the baseband supply...
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Published in: | IEEE transactions on microwave theory and techniques 2012-02, Vol.60 (2), p.361-369 |
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Main Authors: | , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | In this paper, a novel model is proposed for dual-input high efficiency power amplifier (PA) architectures, such as envelope tracking (ET) and varactor-based dynamic load modulation (DLM). Compared to the traditional single-input modeling approach, the proposed model incorporates the baseband supply voltage/load control as an input. This advantage makes the new approach capable to achieve maximized average power-added efficiency (PAE) and minimized output distortion simultaneously. Furthermore, the new approach has shown to be robust towards time misalignment between the RF input and baseband supply voltage/load control signals, and it can be applied with a reduced-bandwidth baseband supply voltage/load control. Experiments have been performed in a varactor-based DLM PA architecture to evaluate the new modeling approach. The results show that it can achieve 9 and 7 dB better performance than the traditional approaches in terms of adjacent channel leakage ratio and normalized mean square error, respectively. At the same time, the average PAE is maximized. Similar results have been achieved with the proposed model even when reduced-bandwidth baseband load control signal is used or time misalignment between the RF and baseband load control input signals exists. Although the new approach is only tested with DLM architecture in this paper, it is very general and can be applied to ET architectures as well. |
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ISSN: | 0018-9480 1557-9670 1557-9670 |
DOI: | 10.1109/TMTT.2011.2176956 |