Novel 2-Bit/Cell Wrapped-Select-Gate SONOS TFT Memory Using Source-Side Injection for NOR-Type Flash Array

This letter is the first to successfully demonstrate the 2-bit/cell wrapped-selected-gate (WSG) SONOS thin-film transistor (TFT) memory using source-side injection (SSI). Because of the higher programming efficiency of SSI, a memory window of approximately 3 V can be easily achieved in 10 μs and 30...

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Bibliographic Details
Published in:IEEE electron device letters 2012-06, Vol.33 (6), p.839-841
Main Authors: WANG, Kuan-Ti, HSUEH, Fang-Chang, LU, Yu-Lun, CHIANG, Tsung-Yu, WU, Yi-Hong, LIAO, Chia-Chun, YEN, Li-Chen, CHAO, Tien-Sheng
Format: Article
Language:English
Subjects:
Applied sciences
Arrays
Charge carrier processes
Compound structure devices
Design. Technologies. Operation analysis. Testing
Electric potential
Electronics
Endurance
Exact sciences and technology
Integrated circuits
Integrated circuits by function (including memories and processors)
Logic gates
Optimization
Programming
Semiconductor devices
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Silicon
SONOS devices
Source-side injection (SSI)
Thin film transistors
thin-film transistor memory
Transistors
two-bit/cell
Voltage
wrapped-selected-gate (WSG)-SONOS
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Summary:This letter is the first to successfully demonstrate the 2-bit/cell wrapped-selected-gate (WSG) SONOS thin-film transistor (TFT) memory using source-side injection (SSI). Because of the higher programming efficiency of SSI, a memory window of approximately 3 V can be easily achieved in 10 μs and 30 ms for the program and erase modes, respectively. In addition, we performed an excellent 2-bit/cell distinguish margin for 3-V memory window in WSG-SONOS TFT memory. The optimal reliability of the endurance and data retention tests can be executed by adjusting the applied voltage appropriately.
ISSN:0741-3106
1558-0563
DOI:10.1109/LED.2012.2192090