A 60-GHz Outphasing Transmitter in 40-nm CMOS

This paper presents the analysis, design, and implementation of a 60-GHz outphasing transmitter in 40-nm bulk CMOS. The 60-GHz outphasing transmitter is optimized for high output power and peak power-added efficiency (PAE) while maintaining sufficient linearity. The chip occupies an active area of 0...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 2012-12, Vol.47 (12), p.3172-3183
Main Authors: Dixian Zhao, Kulkarni, S., Reynaert, P.
Format: Article
Language:English
Subjects:
60 GHz
Amplifiers
Applied sciences
Bandwidth
Baseband
Circuit properties
Circuits of signal characteristics conditioning (including delay circuits)
CMOS
CMOS integrated circuits
Design. Technologies. Operation analysis. Testing
efficiency
Electric, optical and optoelectronic circuits
Electronic circuits
Electronic equipment and fabrication. Passive components, printed wiring boards, connectics
Electronics
Exact sciences and technology
Integrated circuits
linearization
millimeter-wave
mixer
Mixers
outphasing transmitter
Peak to average power ratio
poly-phase filter
power amplifier
power combiner
Power generation
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
transformer
Transmitters
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Summary:This paper presents the analysis, design, and implementation of a 60-GHz outphasing transmitter in 40-nm bulk CMOS. The 60-GHz outphasing transmitter is optimized for high output power and peak power-added efficiency (PAE) while maintaining sufficient linearity. The chip occupies an active area of 0.33 mm 2 and consumes 217 mW from a 1-V supply voltage, delivering 15.6-dBm linear output power with 25% PAE (PA). It achieves a 500-Mb/s 16QAM modulation with 12.5-dBm average output power and 15% average efficiency (PA) at an EVM of -22 dB. Mismatch compensation and phase correction are applied to further improve the average output power and efficiency by about 1.6 dB and 4%, respectively.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2012.2216692