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Dual-metastability FPGA-based true random number generator
A novel concept of a true random number generator (TNRG) based on two metastable flip-flops in a FPGA circuit is introduced. Most of metastable based TRNG solutions are based on the assumption of a D-latch (flip-flop) state's uncertainty which is the source of randomness. In the proposed approa...
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Published in: | Electronics letters 2013-06, Vol.49 (12), p.744-745 |
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Main Author: | |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Request full text |
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Summary: | A novel concept of a true random number generator (TNRG) based on two metastable flip-flops in a FPGA circuit is introduced. Most of metastable based TRNG solutions are based on the assumption of a D-latch (flip-flop) state's uncertainty which is the source of randomness. In the proposed approach direct proximity of the metastable point is not necessary. Difference of the time of response of a pair of nearly metastable flip-flops lies upon the proposed circuit's principle of operation. It can be implemented in common programmable FPGA or CPLD circuits ensuring randomness quality-passing NIST, Diehard and Matlab tests. |
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ISSN: | 0013-5194 1350-911X 1350-911X |
DOI: | 10.1049/el.2012.4126 |