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Single-Cycle Multihop Asynchronous Repeated Traversal: A SMART Future for Reconfigurable On-Chip Networks : Toward a Coherent Multicore Memory Model
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Published in: | Computer (Long Beach, Calif.) Calif.), 2013, Vol.46 (10), p.48-55 |
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Main Authors: | , , , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Online Access: | Get full text |
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ISSN: | 0018-9162 1558-0814 |