High resolution ADC system

We have developed and verified experimentally a novel high-resolution superconducting ADC architecture based on phase modulation/demodulation principle and implemented in RSFQ logic. We have demonstrated an ADC chip providing full implementation of this architecture, including on-chip decimation fil...

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Bibliographic Details
Published in:IEEE transactions on applied superconductivity 1997-06, Vol.7 (2), p.2649-2652, Article 2649
Main Authors: Rylov, S.V., Bunz, L.A., Gaidarenko, D.V., Fisher, M.A., Robertazzi, R.P., Mukhanov, O.A.
Format: Article
Language:English
Subjects:
Applied sciences
Computer architecture
Computer displays
Computer interfaces
Demodulation
Electronic equipment testing
Electronics
Exact sciences and technology
Phase modulation
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Signal sampling
Standards development
Superconducting devices
Superconducting filters
Superconducting logic circuits
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Summary:We have developed and verified experimentally a novel high-resolution superconducting ADC architecture based on phase modulation/demodulation principle and implemented in RSFQ logic. We have demonstrated an ADC chip providing full implementation of this architecture, including on-chip decimation filter and multiple-channel synchronizer. We have also developed a digital ADC evaluation system consisting of an interface electronics block converting the low-voltage ADC output to standard TTL form at multi-MHz sampling rate, and a computerized test station performing data acquisition, processing and display in real time. Using this system we have demonstrated that for low-frequency (kHz) signals our ADC chips possess linearity in excess of 16 bits with Spur-Free Dynamic Range over 108 dB, which is an important benchmark for any high-resolution ADC technology.
ISSN:1051-8223
1558-2515
DOI:10.1109/77.621783