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Integration of two different gate oxide thickness in a 0.6-μm dual voltage mixed signal CMOS process

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Bibliographic Details
Published in:IEEE transactions on electron devices 1995, Vol.42 (1), p.190-192
Main Authors: YASAITIS, K. K. O, YASAITIS, J
Format: Article
Language:English
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ISSN:0018-9383
1557-9646