Anomalous Ti SALICIDE gate to source/drain shorts induced by dry Si etch during TiSi2 local interconnect formation

A new failure mode was observed in a 0.5 μm version of the silicided amorphous-silicon contact and interconnect (SAC) technology. Massive PMOS gate to source/drain shorts were found. The cause is attributed to formation of Ti during the Si etch. The fluorinated Ti surface fails to form adequate TiN...

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Bibliographic Details
Published in:IEEE electron device letters 1994-08, Vol.15 (8), p.283-285
Main Authors: Ting, W., Petti, C., Radigan, S., Ramkumar, K., Trammel, P.
Format: Article
Language:English
Subjects:
Applied sciences
Dry etching
Electronics
Exact sciences and technology
Implants
Integrated circuit interconnections
MOS devices
MOSFETs
Sputter etching
Sputtering
Strips
Testing, measurement, noise and reliability
Tin
Wet etching
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Summary:A new failure mode was observed in a 0.5 μm version of the silicided amorphous-silicon contact and interconnect (SAC) technology. Massive PMOS gate to source/drain shorts were found. The cause is attributed to formation of Ti during the Si etch. The fluorinated Ti surface fails to form adequate TiN diffusion barrier during subsequent rapid thermal annealing (RTA) in N 2 or NH 3 ambient. Si diffuses from the polycrystalline Si gate and/or the p-type source/drain onto the spacer, reacts with Ti and forms resistive leakage paths. A blanket low-dose, low-energy As implant prior to Ti deposition corrects this problem without adversely changing device characteristics.
ISSN:0741-3106
1558-0563
DOI:10.1109/55.296217