A monolithic CMOS 20-b analog-to-digital converter

The authors present a monolithic 20-b analog-to-digital converter (ADC) based on an oversampling feedback architecture. The converter consists of a time-continuous integrator at the input, a pulsewidth modulator in the forward branch of the loop (corresponding to a 10-b ADC), and a 1-b DAC (digital-...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 1991-07, Vol.26 (7), p.910-916
Main Authors: Leopold, H.A., Winkler, G., O'Leary, P., Ilzer, K., Jernej, J.
Format: Article
Language:English
Subjects:
Analog-digital conversion
Applied sciences
Circuits
Digital filters
Digital modulation
Digital-analog conversion
Electric, optical and optoelectronic circuits
Electronics
Exact sciences and technology
Feedback loop
Pulse generation
Pulse modulation
Pulse width modulation converters
Voltage
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Summary:The authors present a monolithic 20-b analog-to-digital converter (ADC) based on an oversampling feedback architecture. The converter consists of a time-continuous integrator at the input, a pulsewidth modulator in the forward branch of the loop (corresponding to a 10-b ADC), and a 1-b DAC (digital-to-analog converter) to generate the feedback voltage. The digital evaluation is carried out with a uniformly weighted rectangular window filter. The circuit is implemented in a standard 2- mu m CMOS n-well process and requires 14 mm/sup 2/ of silicon, including the pads. Measurement results are presented that demonstrate the feasibility of this architecture for 20-b accuracy. The complete circuit has a power consumption of 6.7 mW.< >
ISSN:0018-9200
1558-173X
DOI:10.1109/4.92009