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On-chip wiring design challenges for Gigahertz operation: Interconnections-Addressing the Next Challenge of IC Technology. Part I: Integration and Packaging Trends

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Bibliographic Details
Published in:Proceedings of the IEEE 2001, Vol.89 (4), p.529-555
Main Authors: DEUTSCH, Alina, COTEUS, Paul W, KOPCSAY, Gerard V, SMITH, Howard H, SUROVIC, Christopher W, KRAUTER, Byron L, EDELSTEIN, Daniel C, RESTLE, Phillip J
Format: Article
Language:English
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ISSN:0018-9219
1558-2256