Fault Models and Test Methods for Subthreshold SRAMs

Due to the increasing demand of an extra-low-power system, a great amount of research effort has been spent in the past to develop an effective and economic subthreshold SRAM design. However, the test methods regarding those newly developed subthreshold SRAM designs have not yet been fully discussed...

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Bibliographic Details
Published in:IEEE transactions on computers 2013-03, Vol.62 (3), p.468-481
Main Authors: Chen-Wei Lin, Hung-Hsin Chen, Hao-Yu Yang, Chin-Yuan Huang, Chao, M. C-T, Rei-Fu Huang
Format: Article
Language:English
Subjects:
Circuit faults
Computer simulation
Decoders
Defects
Design engineering
Economics
Faults
Mathematical models
MOSFETs
open defect
Random access memory
Resistance
SRAM
Stability analysis
stability fault
Static random access memory
Stress
sub-V_{th}
subthreshold
testing
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Summary:Due to the increasing demand of an extra-low-power system, a great amount of research effort has been spent in the past to develop an effective and economic subthreshold SRAM design. However, the test methods regarding those newly developed subthreshold SRAM designs have not yet been fully discussed. In this paper, we first categorize the subthreshold SRAM designs into three types, study the faulty behavior of open defects and address decoders faults on each type of designs, and then identify the faults which may not be covered by a traditional SRAM test method. We will also discuss the impact of open defects and threshold-voltage mismatch on sense amplifiers under subthreshold operations. A discussion about the temperature at test is also provided.
ISSN:0018-9340
1557-9956
DOI:10.1109/TC.2011.252