Caching Locator/ID mappings: An experimental scalability analysis and its implications

• Published in: Computer networks (Amsterdam, Netherlands : 1999) Netherlands : 1999), 2013-03, Vol.57 (4), p.897-909
• Main Authors: Kim, Juhoon, Iannone, Luigi, Feldmann, Anja
• Format: Article
• Language: English
• Subjects: Addressing and routing architectures; Applied sciences; Cache; Computer architecture; Computer science; control theory; systems; Computer systems and distributed systems. User interface; Exact sciences and technology; Future Internet architecture; Internet Protocol; Locator/ID separation; Measurements; Memory and file management (including protection and security); Memory organisation. Data processing; Network security; Scalability; Software; Studies
• ISSN: 1389-1286; 1872-7069
• DOI: 10.1016/j.comnet.2012.11.007

Victim of its own success, the current Internet is facing scalability issues that lead the research community to explore alternative architectures. In particular, the Locator/ID Split paradigm, based on the idea of separating the identity from the location of end-systems, is gaining momentum and seems to be the most promising candidate for the future Internet architecture. A critical component of any Locator/ID Split approach, from a performance and resources consumption perspective, as well as from a security point of view, is the cache. The cache is meant to temporarily store mappings, i.e., the bindings between identifiers and locations, in order to provide routers with the knowledge of where to forward packets. Taking as reference protocol LISP (Locator/ID Separation Protocol), the most successful proposal currently under discussion at the IETF, this paper presents a thorough analysis of such a component, including the implications of policies to increase the level of security, based on real packet-level traces. Our results prove that even a timeout as short as 60s provides a high hit ratio and that the impact of using security policies is small. Furthermore, a thorough analysis of the scalability of such a component is provided along with the analysis of which class of applications contributes the major fraction of cache-misses.