Loading…
A 2-V 300-MHz 1-Mb current-sensed double-density SRAM for low-power 0.3-[micro]m CMOS/SIMOX ASICs
A 64 K-wordsx16-bits SRAM test chip, fabricated with the 0.3-[micro]m pseudomulti-Vth CMOS/SIMOX process (a short gate length of 0.2 [micro]m is available for the fully depleted MOSFETs), has demonstrated the 300-MHz operation under a typical condition with 2- and 1-V power supplies.
Saved in:
Published in: | IEEE journal of solid-state circuits 2001-10, Vol.36 (10), p.1524 |
---|---|
Main Authors: | , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Online Access: | Get full text |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Summary: | A 64 K-wordsx16-bits SRAM test chip, fabricated with the 0.3-[micro]m pseudomulti-Vth CMOS/SIMOX process (a short gate length of 0.2 [micro]m is available for the fully depleted MOSFETs), has demonstrated the 300-MHz operation under a typical condition with 2- and 1-V power supplies. |
---|---|
ISSN: | 0018-9200 1558-173X |
DOI: | 10.1109/4.953481 |