Fast Polar Decoders: Algorithm and Implementation

Polar codes provably achieve the symmetric capacity of a memoryless channel while having an explicit construction. The adoption of polar codes however, has been hampered by the low throughput of their decoding algorithm. This work aims to increase the throughput of polar decoding hardware by an orde...

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Bibliographic Details
Published in:IEEE journal on selected areas in communications 2014-05, Vol.32 (5), p.946-957
Main Authors: Sarkis, Gabi, Giard, Pascal, Vardy, Alexander, Thibeault, Claude, Gross, Warren J.
Format: Article
Language:English
Subjects:
Algorithms
Architecture
Channels
Complexity theory
Construction
Decoders
Decoding
Field programmable gate arrays
Hardware
Maximum likelihood decoding
Parity check codes
polar codes
Reliability
storage systems
successive-cancellation decoding
Systematics
Throughput
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Summary:Polar codes provably achieve the symmetric capacity of a memoryless channel while having an explicit construction. The adoption of polar codes however, has been hampered by the low throughput of their decoding algorithm. This work aims to increase the throughput of polar decoding hardware by an order of magnitude relative to successive-cancellation decoders and is more than 8 times faster than the current fastest polar decoder. We present an algorithm, architecture, and FPGA implementation of a flexible, gigabit-per-second polar decoder.
ISSN:0733-8716
1558-0008
DOI:10.1109/JSAC.2014.140514