A Low-Noise Design Technique for High-Speed CMOS Optical Receivers

• Published in: IEEE journal of solid-state circuits 2014-06, Vol.49 (6), p.1437-1447
• Main Authors: Dan Li, Minoia, Gabriele, Repossi, Matteo, Baldi, Daniele, Temporiti, Enrico, Mazzanti, Andrea, Svelto, Francesco
• Format: Article
• Language: English
• Subjects: Bandwidth; Capacitance; CMOS integrated circuits; CMOS technology; current reuse; equalization; Equalizers; Gain; input-referred noise; Noise; Optical receivers; shunt-feedback; transimpedance amplifiers (TIA)
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.2014.2322868

A careful comparison between alternative topologies to realize low-noise wideband TIAs is carried out in this work. In order to break the tradeoff between noise and bandwidth, the proposed front-end uses two stages, i.e. a low-noise narrowband transimpedance interface followed by an equalizer aimed at restoring the required bandwidth. The technique is especially effective for white noise components. The core first-stage amplifier exploits current reuse for minimum power consumption and is optimized for colored noise reduction. A net 4 × noise power reduction is achieved if compared with a design approach based on a traditional shunt-feedback TIA with the same bandwidth. A complete receiver, interfacing a commercial photodiode, and including the proposed two-stage front-end (TSFE), a limiting amplifier and a wideband output buffer has been realized in 65 nm CMOS. Optical communications tailored to 100GBASE-LR4 standard, which is specified for mid-to-long range transmissions at a channel rate of 25 Gb/s, are targeted. Realized prototypes show a sensitivity of -11.9 dBm at a BER of 10 -12 with a PRBS31 input pattern and a transimpedance gain of 83 dBΩ, while tolerating an overall input capacitance of 160 fF. To the best of the authors' knowledge, this is the best sensitivity performance achieved by 25-Gb/s optical receivers in CMOS, comparable to state-of-the-art BiCMOS realizations.