Low Temperature Processed Two-Transistor- Two-Capacitor-Based Ferroelectric Random Access Memory

We have demonstrated a low temperature fully integrated process for a ferroelectric random access memory array for potential flexible electronics applications. The memory cell is based on a two-transistor-two-capacitor structure, with cadmium sulfide as the semiconductor material for n-channel thin-...

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Bibliographic Details
Published in:IEEE transactions on electron devices 2014-10, Vol.61 (10), p.3442-3447
Main Authors: Duo Mao, Mejia, Israel, Salas-Villasenor, Ana L., Stiegler, Harvey J., Gnade, Bruce E., Quevedo-Lopez, Manuel A.
Format: Article
Language:English
Subjects:
Arrays
Cadmium sulfide (CdS)
Capacitors
Copolymers
Electronics
ferroelectric
Ferroelectric films
Ferroelectric materials
ferroelectric random access memory array (FRAM)
Ferroelectricity
flexible electronics
low temperature
Microprocessors
Nonvolatile memory
poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)]
Random access memory
Sulfides
two-transistor-two-capacitor (2T2C)
Voltage
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Summary:We have demonstrated a low temperature fully integrated process for a ferroelectric random access memory array for potential flexible electronics applications. The memory cell is based on a two-transistor-two-capacitor structure, with cadmium sulfide as the semiconductor material for n-channel thin-film transistors, and poly(vinylidene fluoride-trifluoroethylene) copolymer as the ferroelectric material for capacitors. At VDD = 5 V, a voltage difference of ~1 V between the two states (0 and 1) is achieved at the output of the sense amplifier.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2014.2347053