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Effects of High-Temperature Annealing on Operation Characteristics of a-In-Ga-Zn-O TFTs
We report operation characteristics of amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) annealed in dry O 2 at temperatures up to 700 ° C. The largest TFT mobilities were obtained by annealing at 200 ° C-300 ° C and the smallest subthreshold voltage swing ( S) was obtained at 200 ° C, whil...
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Published in: | Journal of display technology 2014-11, Vol.10 (11), p.979-983 |
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container_title | Journal of display technology |
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creator | Hanyu, Yuichiro Abe, Katsumi Domen, Kay Nomura, Kenji Hiramatsu, Hidenori Kumomi, Hideya Hosono, Hideo Kamiya, Toshio |
description | We report operation characteristics of amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) annealed in dry O 2 at temperatures up to 700 ° C. The largest TFT mobilities were obtained by annealing at 200 ° C-300 ° C and the smallest subthreshold voltage swing ( S) was obtained at 200 ° C, while those annealed at higher T exhibited poorer mobilities and S values. The TFTs annealed at ≥ 600 ° C were crystallized and exhibited further poorer characteristics probably due to grain boundary issues; while, the deterioration by the 400 ° C-500 ° C annealing is attributed to depletion of hydrogen and consequent de-passivation effects. Device simulations and photoresponse spectroscopy extracted systematic variation of trap densities in the a-IGZO layer. |
doi_str_mv | 10.1109/JDT.2014.2352860 |
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The largest TFT mobilities were obtained by annealing at 200 ° C-300 ° C and the smallest subthreshold voltage swing ( S) was obtained at 200 ° C, while those annealed at higher T exhibited poorer mobilities and S values. The TFTs annealed at ≥ 600 ° C were crystallized and exhibited further poorer characteristics probably due to grain boundary issues; while, the deterioration by the 400 ° C-500 ° C annealing is attributed to depletion of hydrogen and consequent de-passivation effects. Device simulations and photoresponse spectroscopy extracted systematic variation of trap densities in the a-IGZO layer.</description><identifier>ISSN: 1551-319X</identifier><identifier>EISSN: 1558-9323</identifier><identifier>DOI: 10.1109/JDT.2014.2352860</identifier><identifier>CODEN: IJDTAL</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>Amorphous materials ; Annealing ; defect ; Density ; Deterioration ; Display devices ; Electron traps ; Grain boundaries ; hydrogen passivation ; Photonics ; Semiconductor devices ; Spectroscopy ; Thin film transistors ; thin-film transistors (TFTs) ; Voltage ; Voltage measurement</subject><ispartof>Journal of display technology, 2014-11, Vol.10 (11), p.979-983</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Nov 2014</rights><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c434t-9bcaa17283792438bed5750315c0600165871c10545b19d09322ee953fb72c2e3</citedby><cites>FETCH-LOGICAL-c434t-9bcaa17283792438bed5750315c0600165871c10545b19d09322ee953fb72c2e3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/6884773$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,27922,27923,54794</link.rule.ids></links><search><creatorcontrib>Hanyu, Yuichiro</creatorcontrib><creatorcontrib>Abe, Katsumi</creatorcontrib><creatorcontrib>Domen, Kay</creatorcontrib><creatorcontrib>Nomura, Kenji</creatorcontrib><creatorcontrib>Hiramatsu, Hidenori</creatorcontrib><creatorcontrib>Kumomi, Hideya</creatorcontrib><creatorcontrib>Hosono, Hideo</creatorcontrib><creatorcontrib>Kamiya, Toshio</creatorcontrib><title>Effects of High-Temperature Annealing on Operation Characteristics of a-In-Ga-Zn-O TFTs</title><title>Journal of display technology</title><addtitle>JDT</addtitle><description>We report operation characteristics of amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) annealed in dry O 2 at temperatures up to 700 ° C. The largest TFT mobilities were obtained by annealing at 200 ° C-300 ° C and the smallest subthreshold voltage swing ( S) was obtained at 200 ° C, while those annealed at higher T exhibited poorer mobilities and S values. The TFTs annealed at ≥ 600 ° C were crystallized and exhibited further poorer characteristics probably due to grain boundary issues; while, the deterioration by the 400 ° C-500 ° C annealing is attributed to depletion of hydrogen and consequent de-passivation effects. Device simulations and photoresponse spectroscopy extracted systematic variation of trap densities in the a-IGZO layer.</description><subject>Amorphous materials</subject><subject>Annealing</subject><subject>defect</subject><subject>Density</subject><subject>Deterioration</subject><subject>Display devices</subject><subject>Electron traps</subject><subject>Grain boundaries</subject><subject>hydrogen passivation</subject><subject>Photonics</subject><subject>Semiconductor devices</subject><subject>Spectroscopy</subject><subject>Thin film transistors</subject><subject>thin-film transistors (TFTs)</subject><subject>Voltage</subject><subject>Voltage measurement</subject><issn>1551-319X</issn><issn>1558-9323</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2014</creationdate><recordtype>article</recordtype><recordid>eNpdkD1PwzAQhiMEEqWwI7FEYmFx8dnxR8aq9AtV6hIEYrEc99KmapNiJwP_nrRFDEx3Oj3v6e6JonugAwCaPr--ZANGIRkwLpiW9CLqgRCapJzxy1MPhEP6cR3dhLCllGupZS96HxcFuibEdRHPyvWGZLg_oLdN6zEeVhXaXVmt47qKl6dx2XWjjfXWNejL0JTuFLVkXpGpJZ8VWcbZJAu30VVhdwHvfms_epuMs9GMLJbT-Wi4IC7hSUPS3FkLimmuUpZwneNKKEE5CEclpSCFVuCAikTkkK5o9w1DTAUvcsUcQ96Pns57D77-ajE0Zl8Gh7udrbBugwHVRZSmjHXo4z90W7e-6q4zICWXEjjwjqJnyvk6BI-FOfhyb_23AWqOpk1n2hxNm1_TXeThHCkR8Q-XWidKcf4D4Il2Zw</recordid><startdate>20141101</startdate><enddate>20141101</enddate><creator>Hanyu, Yuichiro</creator><creator>Abe, Katsumi</creator><creator>Domen, Kay</creator><creator>Nomura, Kenji</creator><creator>Hiramatsu, Hidenori</creator><creator>Kumomi, Hideya</creator><creator>Hosono, Hideo</creator><creator>Kamiya, Toshio</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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The largest TFT mobilities were obtained by annealing at 200 ° C-300 ° C and the smallest subthreshold voltage swing ( S) was obtained at 200 ° C, while those annealed at higher T exhibited poorer mobilities and S values. The TFTs annealed at ≥ 600 ° C were crystallized and exhibited further poorer characteristics probably due to grain boundary issues; while, the deterioration by the 400 ° C-500 ° C annealing is attributed to depletion of hydrogen and consequent de-passivation effects. Device simulations and photoresponse spectroscopy extracted systematic variation of trap densities in the a-IGZO layer.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/JDT.2014.2352860</doi><tpages>5</tpages></addata></record> |
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subjects | Amorphous materials Annealing defect Density Deterioration Display devices Electron traps Grain boundaries hydrogen passivation Photonics Semiconductor devices Spectroscopy Thin film transistors thin-film transistors (TFTs) Voltage Voltage measurement |
title | Effects of High-Temperature Annealing on Operation Characteristics of a-In-Ga-Zn-O TFTs |
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