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Formation of Crystalline Si Optical Waveguides on Bulk (100) Si Substrate as a New Platform for On-Chip Interconnect Applications

Lightwave transmission is a promising candidate for data interconnections, including the short-distance data communication. The method by which photonics and electronics ought to be integrated is developing and not well resolved yet. In particular, the different requirements of buried oxide thicknes...

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Bibliographic Details
Published in:Journal of lightwave technology 2017-06, Vol.35 (11), p.2266-2272
Main Authors: Hung, Shih-Che, Lin, Shih-Jieh, Chao, Jiun-Jie, Chang, Chia-Yu, Lin, Meng-Jie, Lin, Ching-Fuh
Format: Article
Language:English
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Summary:Lightwave transmission is a promising candidate for data interconnections, including the short-distance data communication. The method by which photonics and electronics ought to be integrated is developing and not well resolved yet. In particular, the different requirements of buried oxide thickness for photonics and electronics hamper their integration on the same chip. In this paper, we present a crystalline Si-core waveguide as the platform of interconnection and proceed to investigate its characteristics. The Si-core of the waveguide on bulk (100) Si substrate is formed by an excimer laser system through shape reformation. The SiO2 cladding is later on created through oxidation process. Though the Si-core's shape has changed, it still preserves its monocrystalline properties, and displays a broadband transmission. This test shows several local defects along axial direction cause obvious scattering of the guided wave, and propagation loss is estimated to be about 7 dB/cm. We think the defects come from an observed wavy structure and this loss is improvable via our proposed methods. In addition, the core distance to substrate is adjustable and the sidewall roughness is good. Hence we proceed to analyze the losses theoretically. The various kinds of loss are potentially reducible to 1 dB/cm, except coupling loss on end facets, which is also improvable with the use of proper coupling devices. These demonstrate the potentiality of the platform for on-chip interconnect applications.
ISSN:0733-8724
1558-2213
DOI:10.1109/JLT.2016.2646381