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Effects of source/drain elevation and side spacer dielectric on drivability performance of non-abrupt ultra shallow junction gate underlap GAA MOSFETs

Present work focuses on quantitative effects of source/drain elevation height ( h SD ) and side spacer dielectric material (Air, SiO 2 , Si 3 N 4 and HfO 2 ) on the current drive of non-abrupt ultra shallow junction (USJ) gate all around (GAA) MOSFETs. It has been observed that the desirable unanimo...

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Bibliographic Details
Published in:Indian journal of physics 2018-02, Vol.92 (2), p.171-176
Main Authors: Singh, Kunal, Kumar, Sanjay, Goel, Ekta, Singh, Balraj, Singh, Prince Kumar, Baral, Kamalaksha, Kumar, Hemant, Jit, Satyabrata
Format: Article
Language:English
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Summary:Present work focuses on quantitative effects of source/drain elevation height ( h SD ) and side spacer dielectric material (Air, SiO 2 , Si 3 N 4 and HfO 2 ) on the current drive of non-abrupt ultra shallow junction (USJ) gate all around (GAA) MOSFETs. It has been observed that the desirable unanimous reverse trend (increase in I on and decrease in I off with increase in source/drain elevation height ( h SD ) and/or side spacer dielectric constant, ε sp ). Utmost percentage improvement in I on / I off ratio at h SD = 30.5 nm and σ L = 7 nm is found to be ~3000% for HfO 2 while least as ~449% for Air with respect to their corresponding values at zero elevation. Thus, the increase in source/drain elevation with proper selection of side spacer is found to be a suitable approach. This will enhance the drivability as well as lower parasitic resistance in comparison to non elevated GAA MOSFETs at sub 20 nm technology node.
ISSN:0973-1458
0974-9845
DOI:10.1007/s12648-017-1091-2