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Quantitative Analysis of Deuterium Annealing Effect on Poly-Si TFTs by Low Frequency Noise and DC – Characterization
Deuterium (D 2 ) annealing was applied to a poly-crystalline silicon thin-film transistor (poly-Si TFT) to improve reliability and performance. The field-effect electron mobility ( \mu ) was extracted using the gate transconductance ( {g}_{m} ) method. It was found that \mu was improved before and...
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Published in: | IEEE transactions on electron devices 2018-04, Vol.65 (4), p.1640-1644 |
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Main Authors: | , , , , , , , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | Deuterium (D 2 ) annealing was applied to a poly-crystalline silicon thin-film transistor (poly-Si TFT) to improve reliability and performance. The field-effect electron mobility ( \mu ) was extracted using the gate transconductance ( {g}_{m} ) method. It was found that \mu was improved before and after D 2 annealing. The interface trap density ( {D}_{\text {it}} ) as well as the oxide trap density ( {N}_{\text {ot}} ) in the poly-Si TFTs was quantitatively extracted using both conventional dc I-V characterization and analysis of low frequency noise ( LFN ). The profile of {N}_{\text {ot}} along the depth direction was investigated before and after D 2 annealing using LFN characteristics. It was confirmed that {D}_{\text {it}} as well as {N}_{\text {ot}} was reduced by the D 2 annealing, resulting in a reduction in power spectral density and variation. |
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ISSN: | 0018-9383 1557-9646 |
DOI: | 10.1109/TED.2018.2805316 |