The verification of the protection mechanisms of high-level language machines

Recent advances in microdevice technology have helped speed the movement of high-level languages and operating system mechanisms and functions into processor designs. This movement has resulted in the increased complexity of processor designs and of instruction sets, and greater complexity in proces...

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Bibliographic Details
Published in:International Journal of Computer & Information Sciences 1983-08, Vol.12 (4), p.211-246
Main Author: GLIGOR, V. D
Format: Article
Language:English
Subjects:
Applied sciences
Architecture
Computer languages
Computer science
Computers, microcomputers
Electronics
Exact sciences and technology
Hardware
Protection
Verification
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Summary:Recent advances in microdevice technology have helped speed the movement of high-level languages and operating system mechanisms and functions into processor designs. This movement has resulted in the increased complexity of processor designs and of instruction sets, and greater complexity in processor-supported protection mechanisms. A practical methodology is presented for the verification of correctness and completeness of the processor-supported mechanisms of high-level language machines. Although the methodology is informal, it does not lack precision, a feature not found in other informal verification attempts. The verification has been used on the specifications of both an experimental and commercial Burroughs Corp. processor. The methodology is applicable to any processor architecture of considerable complexity.
ISSN:0091-7036
0885-7458
1573-7640
DOI:10.1007/BF00991620