A New Simplified Multilevel Inverter Topology for DC-AC Conversion

Multilevel converters offer high power capability, associated with lower output harmonics and lower commutation losses. Their main disadvantage is their complexity, requiring a great number of power devices and passive components, and a rather complex control circuitry. This work reports a new multi...

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Bibliographic Details
Published in:IEEE transactions on power electronics 2006-09, Vol.21 (5), p.1311-1319
Main Authors: Ceglia, G., Guzman, V., Sanchez, C., Ibanez, F., Walter, J., Gimenez, M.I.
Format: Article
Language:English
Subjects:
Applied sciences
Capacitor clamped
Capacitors
Circuit testing
Circuit topology
Circuits
Costs
Devices
diode clamped
Diodes
Electric currents
Electric power
Electrical engineering. Electrical power engineering
Exact sciences and technology
field programmable gate array (FPGA)
Field programmable gate arrays
H-bridge
Inverters
Multilevel
multilevel inverter
Power capacitors
Power electronics, power supplies
Power system harmonics
Predictive models
Reduction
Switches
Topology
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Summary:Multilevel converters offer high power capability, associated with lower output harmonics and lower commutation losses. Their main disadvantage is their complexity, requiring a great number of power devices and passive components, and a rather complex control circuitry. This work reports a new multilevel inverter topology using an H-bridge output stage with a bidirectional auxiliary switch. The new topology produces a significant reduction in the number of power devices and capacitors required to implement a multilevel output. The new topology is used in the design of a five-level inverter; only five controlled switches, eight diodes, and two capacitors are required to implement the five-level inverter using the proposed topology. The new topology achieves a 37.5% reduction in the number of main power switches required (five in the new against eight in any of the other three configurations) and uses no more diodes or capacitors that the second best topology in the literature, the Asymmetric Cascade configuration. Additionally, the dedicated modulator circuit required for multilevel inverter operation is implemented using a FPGA circuit, reducing overall system cost and complexity. Theoretical predictions are validated using simulation in SPICE, and satisfactory circuit operation is proved with experimental tests performed on a laboratory prototype
ISSN:0885-8993
1941-0107
DOI:10.1109/TPEL.2006.880303