A fabrication guide for planar silicon quantum dot heterostructures

We describe important considerations to create top-down fabricated planar quantum dots in silicon, often not discussed in detail in literature. The subtle interplay between intrinsic material properties, interfaces and fabrication processes plays a crucial role in the formation of electrostatically...

Full description

Saved in:
Bibliographic Details
Published in:arXiv.org 2018-02
Main Authors: Spruijtenburg, Paul C, Amitonov, Sergey V, Wilfred G van der Wiel, Zwanenburg, Floris A
Format: Article
Language:English
Subjects:
Depletion
Drying
Heterostructures
Material properties
Nanowires
Oxidation
Palladium
Physical vapor deposition
Quantum dots
Self-assembly
Side effects
Silicon
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:We describe important considerations to create top-down fabricated planar quantum dots in silicon, often not discussed in detail in literature. The subtle interplay between intrinsic material properties, interfaces and fabrication processes plays a crucial role in the formation of electrostatically defined quantum dots. Processes such as oxidation, physical vapor deposition and atomic-layer deposition must be tailored in order to prevent unwanted side effects such as defects, disorder and dewetting. In two directly related manuscripts written in parallel we use techniques described in this work to create depletion-mode quantum dots in intrinsic silicon, and low-disorder silicon quantum dots defined with palladium gates. While we discuss three different planar gate structures, the general principles also apply to 0D and 1D systems, such as self-assembled islands and nanowires.
ISSN:2331-8422
DOI:10.48550/arxiv.1709.08866