A 8 bits Pipeline Analog to Digital Converter Design for High Speed Camera Application

- This paper describes a pipeline analog-to-digital converter is implemented for high speed camera. In the pipeline ADC design, prime factor is designing operational amplifier with high gain so ADC have been high speed. The other advantage of pipeline is simple on concept, easy to implement in layou...

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Published in:arXiv.org 2008-08
Main Authors: Prasetyo, Eri, Hamzah Afandi, Nurul Huda Dominique Ginhac, Paindavoine, Michel
Format: Article
Language:English
Subjects:
Amplification
Amplifier design
Analog to digital conversion
Analog to digital converters
Capacitors
CMOS
Design factors
Gain
High gain
High speed
High speed cameras
Operational amplifiers
Pipeline design
Pipelines
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creator Prasetyo, Eri
Hamzah Afandi
Nurul Huda Dominique Ginhac
Paindavoine, Michel
description - This paper describes a pipeline analog-to-digital converter is implemented for high speed camera. In the pipeline ADC design, prime factor is designing operational amplifier with high gain so ADC have been high speed. The other advantage of pipeline is simple on concept, easy to implement in layout and have flexibility to increase speed. We made design and simulation using Mentor Graphics Software with 0.6 \mu m CMOS technology with a total power dissipation of 75.47 mW. Circuit techniques used include a precise comparator, operational amplifier and clock management. A switched capacitor is used to sample and multiplying at each stage. Simulation a worst case DNL and INL of 0.75 LSB. The design operates at 5 V dc. The ADC achieves a SNDR of 44.86 dB. keywords: pipeline, switched capacitor, clock management
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subjects Amplification
Amplifier design
Analog to digital conversion
Analog to digital converters
Capacitors
CMOS
Design factors
Gain
High gain
High speed
High speed cameras
Operational amplifiers
Pipeline design
Pipelines
title A 8 bits Pipeline Analog to Digital Converter Design for High Speed Camera Application
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