Reliability-Performance Analysis of Hardware and Software Co-Designs in SRAM-Based APSoCs

• Published in: IEEE transactions on nuclear science 2018-08, Vol.65 (8), p.1935-1942
• Main Authors: Antunes Tambara, Lucas, Kastensmidt, Fernanda Lima, Rech, Paolo, Lins, Filipe, Medina, Nilberto H., Added, Nemitala, Aguiar, Vitor A. P., Silveira, Marcilei A. G.
• Format: Article
• Language: English
• Subjects: All programmable system-on-chip (APSoC); Computer programs; fault injection (FI); Field programmable gate arrays; field-programmable gate array (FPGA); Hardware; hardware and software co-design; processor; Program processors; Programmable logic arrays; Programmable logic devices; Radiation; Radiation effects; Reliability analysis; Reliability engineering; single-event effects; Soft errors; Software; Software reliability; System on chip; Working conditions; Workload; Workloads
• ISSN: 0018-9499; 1558-1578
• DOI: 10.1109/TNS.2018.2844250

All programmable system-on-chip (APSoC) devices provide higher system performance and programmable flexibility at lower costs compared to standalone field-programmable gate array devices and processors. Unfortunately, it has been demonstrated that the high complexity and density of APSoCs increase the system's susceptibility to radiation-induced errors. This paper investigates the effects of soft errors on APSoCs at design level through reliability and performance analyses. We explore 28 different hardware and software co-designs varying the workload distribution between hardware and software. We also propose a reliability analysis flow based on fault injection (FI) to estimate the reliability trend of hardware-only and software-only designs and hardware-software co-designs. Results obtained from both radiation experiments and FI campaigns reveal that performance and reliability can be improved up to 117× by offloading the workload of an APSoC-based system to its programmable logic core. We also show that the proposed flow is a precise method to estimate the reliability trend of system designs on APSoCs before radiation experiments.