A CMOS Frequency Doubler from the Analog Cosine Mapping Function

• Published in: Circuits, systems, and signal processing systems, and signal processing, 2019-04, Vol.38 (4), p.1506-1519
• Main Authors: Gonzalez-Diaz, Victor R., Zamora-Mejia, Gregorio, Guerrero-Castellanos, Jose F., Mino-Aguilar, Gerardo, Torrealba-Melendez, Richard, Maloberti, Franco
• Format: Article
• Language: English
• Subjects: Analog circuits; Approximation; Circuit design; Circuits; Circuits and Systems; CMOS; Design; Electrical Engineering; Electronics and Microelectronics; Engineering; Frequency doublers; Frequency synthesizers; Instrumentation; Mapping; Second harmonic generation; Signal processing; Signal,Image and Speech Processing; Trigonometric functions
• ISSN: 0278-081X; 1531-5878
• DOI: 10.1007/s00034-018-0941-2

This work presents the design of a new frequency doubler by a simple inductorless active network, without the exigency of additional quadrature signals. The frequency doubling function of the proposed circuit relies on the analog cosine mapping operation. The mapping circuit is possible in voltage mode as the circuit is based on two face-to-face CMOS inverters switched by the same differential input signal. The circuit is designed, with a simple set of functions, according to the nonlinear circuit’s nature. It was designed in a CMOS 0.18- μ m process with a doubling frequency up to 8 GHz . The experimental results of the prototype on the mentioned frequency range show the frequency doubling operation with a phase noise figure of - 130 dBc/Hz @ 10 KHz offset from the carrier.