Impact of gate workfunction in junctionless versus junction SOI n-MOSFET transistor

In this paper, the effect of gate workfunction variation on DC characteristics in 100 nm gate length silicon-on-insulator (SOI) junctionless (JL) and junction transistors has been investigated by using numerical simulations. The digital figure-of-merits characteristics such as threshold voltage (V T...

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Bibliographic Details
Main Authors: Huda, A. R. N., Arshad, M. K. Md, Othman, Noraini, Voon, C. H., Liu, Wei-Wen, Hashim, U., Lee, H. Cheun, Adelyn, P. Y. P., Kahar, S. M.
Format: Conference Proceeding
Language:English
Subjects:
Computer simulation
Junction transistors
MOSFETs
Semiconductor devices
SOI (semiconductors)
Threshold voltage
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Summary:In this paper, the effect of gate workfunction variation on DC characteristics in 100 nm gate length silicon-on-insulator (SOI) junctionless (JL) and junction transistors has been investigated by using numerical simulations. The digital figure-of-merits characteristics such as threshold voltage (V TH ), on/off-current ratio, subthreshold voltage, and drain-induced-barrier-lowering are the main parameters that have been investigated. The rate of change in V TH with the respect to gate workfunction for both JLT and JT devices was almost same. Besides that, it shows the designated JLT device is achieving full-depletion at higher gate workfunction of more than 5.0 eV whereas the designated JT device is more wider range, ranging from low, mid-gap or high workfunction.
ISSN:0094-243X
1551-7616
DOI:10.1063/1.4948901