Epitaxial GeSn film formed by solid phase epitaxy and its application to Yb2O3-gated GeSn metal-oxide-semiconductor capacitors with sub-nm equivalent oxide thickness

• Published in: Applied physics letters 2014-11, Vol.105 (20)
• Main Authors: Lee, Ching-Wei, Wu, Yung-Hsien, Hsieh, Ching-Heng, Lin, Chia-Chun
• Format: Article
• Language: English
• Subjects: Applied physics; Capacitors; Crystal structure; Epitaxy; Equivalence; Free surfaces; Leakage current; Metal oxide semiconductors; MOS devices; Passivity; Silicon dioxide; Single crystals; Solid phases; Substrates; Surface roughness; Thickness
• ISSN: 0003-6951; 1077-3118
• DOI: 10.1063/1.4902119

Through the technique of solid phase epitaxy (SPE), an epitaxial Ge0.955Sn0.045 film was formed on a Ge substrate by depositing an amorphous GeSn film followed by a rapid thermal annealing at 550 °C. A process that uses a SiO2 capping layer on the amorphous GeSn film during SPE was proposed and it prevents Sn precipitation from occurring while maintaining a smooth surface due to the reduced surface mobility of Sn atoms. The high-quality epitaxial GeSn film was observed to have single crystal structure, uniform thickness and composition, and tiny surface roughness with root mean square of 0.56 nm. With a SnOx-free surface, Yb2O3-gated GeSn metal-oxide-semiconductor (MOS) capacitors with equivalent oxide thickness (EOT) of 0.55 nm were developed. A small amount of traps inside the Yb2O3 was verified by negligible hysteresis in capacitance measurement. Low leakage current of 0.4 A/cm2 at gate bias of flatband voltage (VFB)-1 V suggests the high quality of the gate dielectric. In addition, the feasibility of using Yb2O3 to well passivate GeSn surface was also evidenced by the small interface trap density (Dit) of 4.02 × 1011 eV−1 cm−2, which can be attributed to smooth GeSn surface and Yb2O3 valency passivation. Both leakage current and Dit performance outperform other passivation techniques at sub-nm EOT regime. The proposed epitaxial GeSn film along with Yb2O3 dielectric paves an alternative way to enable high-performance GeSn MOS devices.