An Oversampling Stochastic ADC Using VCO-Based Quantizers

• Published in: IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2018-12, Vol.65 (12), p.4037-4050
• Main Authors: Sun, Hyuk, Sobue, Kazuki, Hamashita, Koichi, Moon, Un-Ku
• Format: Article
• Language: English
• Subjects: Adders; Analog to digital conversion; Analog to digital converters; Analog-digital conversion; CMOS; CMOS digital integrated circuits; Counters; Data converter; Error analysis; Low=power electronics; Measurement; Noise levels; Oversampling; Quantization (signal); Random variables; stochastic analog-to-digital converter; Voltage controlled oscillators; voltage-controlled oscillator (VCO)-based quantizer
• ISSN: 1549-8328; 1558-0806
• DOI: 10.1109/TCSI.2018.2836466

An oversampling stochastic analog-to-digital converter is presented. This stochastic converter spatially averages quantization errors in multiple voltage-controlled oscillator (VCO)-based quantizers. Unlike other stochastic converters, this proposed architecture does not require an inverse Gaussian cumulative density function estimator. The digital adder becomes an ideal estimator due to uncorrelated quantization errors, which can be modeled as a uniformly distributed random variable. Because of the simple open-loop structure, this stochastic converter can easily be synthesized and reconfigured. The proof-of-concept prototype is implemented in a 0.18 μm CMOS process. The prototype employs eight VCO-based quantizers and validates the extra 9 dB signal to quantization noise ratio improvement from quantization error spatial averaging. The measurements further demonstrate 54.2 dB and 45.4 dB SNDR for 50 MHz and 100 MHz bandwidths, while dissipating 116 mW of power.