A 6.9-[Formula Omitted]m Pixel-Pitch Back-Illuminated Global Shutter CMOS Image Sensor With Pixel-Parallel 14-Bit Subthreshold ADC

• Published in: IEEE journal of solid-state circuits 2018-01, Vol.53 (11), p.3017
• Main Authors: Sakakibara, Masaki, Ogawa, Koji, Sakai, Shin, Tochigi, Yasuhisa, Honda, Katsumi, Kikuchi, Hidekazu, Wada, Takuya, Kamikubo, Yasunobu, Miura, Tsukasa, Nakamizo, Masahiko, Jyo, Naoki, Hayashibara, Ryo, Miyata, Shinya, Yamamoto, Satoshi, Ota, Yoshiyuki, Takahashi, Hirotsugu, Taura, Tadayuki, Oike, Yusuke, Tatani, Keiji, Ezaki, Takayuki, Hirayama, Teruo
• Format: Article
• Language: English
• Subjects: Analog to digital conversion; Analog to digital converters; Circuits; CMOS; Digital cameras; Digital imaging; Figure of merit; Pixels; Power consumption; Product design; Sensors
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.2018.2863947

In this paper, we report on a back-illuminated, global shutter, CMOS image sensor (CIS) with a pixel-parallel, single-slope analog-to-digital converter (ADC). We adopted a digital bucket relay transfer with multistage flip-flop connection, a pixel unit Cu–Cu connection, and positive-feedback circuitry, to realize a 6.9-[Formula Omitted] pixel-pitch, 1.46-Mpixel pixel-parallel ADC. By operating the comparator with a bias current in the subthreshold region of 7.74–111 nA, we succeeded in reducing the peak current during simultaneous ADC. In combination with an ADC standby operation, we succeeded in further reducing the pixel-parallel ADC power consumption. With these techniques, we realized a normalized figure of merit of 0.24 nJ[Formula Omitted]rms/step calculated by dividing the entire sensor power by the effective ADC resolution at a subthreshold current of 111 nA during 660 frames/s operation.