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Design and evaluation of a high‐accuracy current sensing circuit
This paper introduces a high‐accuracy current sensing circuit consuming low power. The structure includes five current and voltage transformation stages, and uses resistors to reduce the input offset voltage. By allowing a wide common‐mode input range, the versatility of the proposed topology is gre...
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Published in: | IEEJ transactions on electrical and electronic engineering 2018-12, Vol.13 (12), p.1777-1782 |
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Main Authors: | , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites |
Online Access: | Get full text |
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Summary: | This paper introduces a high‐accuracy current sensing circuit consuming low power. The structure includes five current and voltage transformation stages, and uses resistors to reduce the input offset voltage. By allowing a wide common‐mode input range, the versatility of the proposed topology is greatly widened. The proposed current sensing circuit is implemented with the 0.35‐μm Bipolar‐CMOS‐DMOS (BCD) process with the block area down to 3.68 mm2. The supply current is decreased to 1 μA while still guaranteeing a fast transient response. © 2018 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc. |
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ISSN: | 1931-4973 1931-4981 |
DOI: | 10.1002/tee.22740 |