Performance of Satellite Digital Transparent Processors Through Equivalent Noise

This paper presents a novel analysis and design of satellite digital transparent processors. An equivalent noise model is developed and validated to characterize the nonideal behaviours in all stages of a digital on-board processor, and the typical link-budget approach is extended to incorporate the...

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Bibliographic Details
Published in:IEEE transactions on aerospace and electronic systems 2018-12, Vol.54 (6), p.2643-2661
Main Authors: Sulli, V., Santucci, F., Faccio, M., Giancristofaro, D.
Format: Article
Language:English
Subjects:
Bandwidth
Computer architecture
Degradation
Digital transparent processors (DTPs)
Distortion
Equivalence
fixed-point arithmetics
Hardware
link budget
Microprocessors
Noise
noise figure
Payloads
Performance indices
Processors
Program processors
quantization noise
satellite communications
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Summary:This paper presents a novel analysis and design of satellite digital transparent processors. An equivalent noise model is developed and validated to characterize the nonideal behaviours in all stages of a digital on-board processor, and the typical link-budget approach is extended to incorporate the related noise contributions. The theoretical framework is then exploited to support an explicit design procedure that relates typical link-budget performance indices to the final HW specifications of every single processing block.
ISSN:0018-9251
1557-9603
DOI:10.1109/TAES.2018.2826378