Design of a Closed-Loop, Bidirectional Brain Machine Interface System With Energy Efficient Neural Feature Extraction and PID Control

• Published in: IEEE transactions on biomedical circuits and systems 2017-08, Vol.11 (4), p.729-742
• Main Authors: Xilin Liu, Milin Zhang, Richardson, Andrew G., Lucas, Timothy H., Van der Spiegel, Jan
• Format: Article
• Language: English
• Subjects: Action potential; Action Potentials; Analog circuits; Animals; Bluetooth; Body mass; Brain; Brain machine interface; Brain-Computer Interfaces; closed-loop; CMOS; Configurations; Converters; Digitization; Electric potential; Electrophysiological recording; Energy efficiency; Equipment Design; Feature extraction; low-power; Man-machine interfaces; Microcontrollers; Nervous system; neural feature extraction; neural recording; neural stimulation; Neurons - physiology; Neurophysiology; Neurophysiology - instrumentation; Neuroscience; Oscillators; Programmable logic controllers; Proportional integral derivative; proportional-integral-derivative (PID); Recording; Stimulators; System on chip; Topology; Tuning; Windows (intervals); Wireless communication; Wireless Technology
• ISSN: 1932-4545; 1940-9990
• DOI: 10.1109/TBCAS.2016.2622738

This paper presents a bidirectional brain machine interface (BMI) microsystem designed for closed-loop neuroscience research, especially experiments in freely behaving animals. The system-on-chip (SoC) consists of 16-channel neural recording front-ends, neural feature extraction units, 16-channel programmable neural stimulator back-ends, in-channel programmable closed-loop controllers, global analog-digital converters (ADC), and peripheral circuits. The proposed neural feature extraction units includes 1) an ultra low-power neural energy extraction unit enabling a 64-step natural logarithmic domain frequency tuning, and 2) a current-mode action potential (AP) detection unit with time-amplitude window discriminator. A programmable proportional-integral-derivative (PID) controller has been integrated in each channel enabling a various of closed-loop operations. The implemented ADCs include a 10-bit voltage-mode successive approximation register (SAR) ADC for the digitization of the neural feature outputs and/or local field potential (LFP) outputs, and an 8-bit current-mode SAR ADC for the digitization of the action potential outputs. The multi-mode stimulator can be programmed to perform monopolar or bipolar, symmetrical or asymmetrical charge balanced stimulation with a maximum current of 4 mA in an arbitrary channel configuration. The chip has been fabricated in 0.18μ m CMOS technology, occupying a silicon area of 3.7 mm 2 . The chip dissipates 56 μW/ch on average. General purpose low-power microcontroller with Bluetooth module are integrated in the system to provide wireless link and SoC configuration. Methods, circuit techniques and system topology proposed in this work can be used in a wide range of relevant neurophysiology research, especially closed-loop BMI experiments.