Hardware implementation and performance evaluation of the fast adaptive single-phase auto reclosing algorithm

• Published in: Electric power systems research 2019-03, Vol.168, p.169-183
• Main Authors: Dias, Ozenir, Tavares, Maria Cristina, Magrin, Fabiano
• Format: Article
• Language: English
• Subjects: Adaptive algorithms; Algorithms; Arduino; Computer peripherals; Computer simulation; Electric potential; Electric power; Electric power systems; Hardware; Hardware in the loop (HIL) test; Hardware-in-the-loop simulation; Oscillators; Performance evaluation; Real time; Real time digital simulator (RTDS); Simulators; Single-phase auto-reclosing; Software development; Transmission lines
• ISSN: 0378-7796; 1873-2046
• DOI: 10.1016/j.epsr.2018.11.019

•Use of a low cost hardware for the implementation of the AdSPAR in hardware in the loop (HIL) real time digital simulations.•Identification of misoperations that could not be identified when just the software tests were implemented.•Tests of oscillograms of actual events. It includes voltage transformer harmonic attenuation and distortion.•The new adaptive protection algorithm was coded in a low-cost commercial hardware, emulating the new relay prototype.•Robustness of proposed algorithm based on low-order voltage harmonic content was proved. This study describes the hardware implementation of a fast adaptive single-phase auto reclosing algorithm based on voltage harmonic content measurement. The proposed algorithm classifies the fault type, preventing reclosing onto permanent fault, and identifies the arc extinction instant, adjusting dead-time to implement reclosing with granted success. The hardware was connected to the Real Time Digital Simulator (RTDS) to perform tests in hardware-in-the-loop (HIL) with a protective relay. The studied system is based on a 500kV transmission line of the Brazilian electrical power system and eventually real case oscillograms were tested. The algorithm performance was validated with previous software development. However, in the present document we highlight the importance to implement hardware test, as operational limits can only be identified in this last testing stage. Robustness of proposed algorithm based on low-order voltage harmonic content was proved with oscillograms’ tests.