128 mA CMOS LDO with 108 db PSRR at 2.4 MHz frequency

Class AB, rail-to-rail output (M32 and M33) formed a power noise cancellation thus minimizing the size of the pass transistor and increases the power efficiency [10]. Since the amplifier is responsible to drive the gate of the pass transistor which is naturally capacitive, class AB output is also us...

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Bibliographic Details
Published in:Telkomnika 2019-10, Vol.17 (5), p.2434-2444
Main Authors: Fifie, Astrie Nurasyeila, Wong, Yan Chiew
Format: Article
Language:English
Subjects:
Amplifiers
Circuit design
Circuits
CMOS
Electric potential
Electrical noise
Integrated circuits
Power efficiency
Power supply
Signal processing
Transistors
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Summary:Class AB, rail-to-rail output (M32 and M33) formed a power noise cancellation thus minimizing the size of the pass transistor and increases the power efficiency [10]. Since the amplifier is responsible to drive the gate of the pass transistor which is naturally capacitive, class AB output is also used to reduce the output impedance of the error amplifier to ensure stability of the circuit [11, 12]. From Figure 5, assumes VD=V2, then IoRo=VD-VD1=VT ln (N) which is the VPTAT. [...]VPTAT is equals to the voltage across the resistor Ro, and VCTAT is the voltage across the diode, D1. [...]both the downward and upward curves can be achieved. Figure 9 shows the proposed LDO circuit. 3.Results and Analysis The proposed circuit is designed using thick oxide 0.18 pm Silterra CMOS technology and produce a 1.8 V output voltage at input supply of 3.3 V and temperature between -40 °C to 125 °C. 1.65 V VREF and 10 pA current is injected into the error amplifier to power the circuit. 1 pF off-chip capacitor is applied at the output of the LDO to obtain high PSRR system.
ISSN:1693-6930
2302-9293
DOI:10.12928/telkomnika.v17i5.12795