High-temperature reverse bias characteristics of highly reliable GaN MOS-HFET

We previously proposed a GaN MOS-HFET that practically reduces the maximum electric field strength in the MOS gate to one-third under high voltage reverse bias because a JFET is placed between the MOS gate and the drain electrode. We report here that this structure significantly improves high-temper...

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Bibliographic Details
Published in:Japanese Journal of Applied Physics 2019-07, Vol.58 (7), p.76504
Main Authors: Hoshi, Shinichi, Hata, Kensuke, Eum, Youngshin, Arakawa, Kazuki, Kuzuhara, Masaaki
Format: Article
Language:English
Subjects:
Bias
Electric field strength
Electric potential
High temperature
High voltages
JFET
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Summary:We previously proposed a GaN MOS-HFET that practically reduces the maximum electric field strength in the MOS gate to one-third under high voltage reverse bias because a JFET is placed between the MOS gate and the drain electrode. We report here that this structure significantly improves high-temperature reverse bias (HTRB) characteristics in reverse bias retention compared to our conventional GaN MOS-HFET. The proposed GaN MOS-HFET with a saturation current of more than 60 A achieved excellent HTRB characteristics with a rated voltage of 650 V at 150 °C for 1000 h, in addition to a low on-resistance of 110 m and good switching characteristics of rise time (Tr)/fall time (Tf) of 5.1/6.5 ns.
ISSN:0021-4922
1347-4065
DOI:10.7567/1347-4065/ab264f