Methodology for pad conditioning sweep optimization for advanced nodes

With increasing focus on 3D integration of devices, there is an increasing demand for polishing thick silicon dioxide films. The impact of changes in the CMP pad thickness profiles on high silicon dioxide film rates and profiles are studied. A simulator was used to predict pad thickness profiles for...

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Bibliographic Details
Published in:Microelectronic engineering 2019-08, Vol.216, p.111101, Article 111101
Main Authors: Khanna, Aniruddh J., Jawali, Puneet, Redfield, Daniel, Kakireddy, Raghava, Chockalingam, Ashwin, Benvegnu, Dominic, Yang, Mo, Rozo, Sebastian, Fung, Jason, Cornejo, Mario, Abramson, Igor, Yamamura, Mayu, Yuan, Zhibo, Bajaj, Rajeev
Format: Article
Language:English
Subjects:
Chemical-mechanical polishing
Conditioning
Metrology
Microscopy
Optimization
Silica
Silicon dioxide
Thick films
Thickness measurement
Thin films
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Summary:With increasing focus on 3D integration of devices, there is an increasing demand for polishing thick silicon dioxide films. The impact of changes in the CMP pad thickness profiles on high silicon dioxide film rates and profiles are studied. A simulator was used to predict pad thickness profiles for different pad conditioning sweeps. Subsequently, these different pad conditioning sweep profiles were used to study their impact on pad thickness profiles and material removal rates (MRR) experimentally on an Applied Materials' (AMAT) 300 mm wafer Reflexion® LK polisher. The pad thickness profiles were measured using laser confocal microscopy and AMAT's state-of-the-art full pad surface metrology tool. The difference in the pad thickness values provided by all the 3 methods was
ISSN:0167-9317
1873-5568
DOI:10.1016/j.mee.2019.111101