A High-Performance Common-Mode Noise Absorption Circuit Based on Phase Modification Technique

• Published in: IEEE transactions on microwave theory and techniques 2019-11, Vol.67 (11), p.4394-4403
• Main Authors: Chan, Chao-Kai, Wu, Tzong-Lin
• Format: Article
• Language: English
• Subjects: Absorption; Absorptive filter; Attenuation; Circuits; common-mode filter (CMF); common-mode noise; common-mode noise absorption circuit (CMNAC); Delays; differential signaling; Digital systems; Electric noise; Electromagnetic interference; electromagnetic interference (EMI); eye diagram; Group delay; High speed; lossy circuit; Microwave circuits; Radio frequency interference; radio-frequency interference (RFI); Signal transmission; Transfer functions
• ISSN: 0018-9480; 1557-9670
• DOI: 10.1109/TMTT.2019.2940015

In this article, a high-performance common-mode noise absorption circuit (CMNAC) is proposed for solving electromagnetic interference (EMI) or radio-frequency interference (RFI) problems in high-speed differential digital systems. Instead of reflecting common-mode noises by conventional common-mode filters (CMFs), the common-mode noises can be absorbed in the proposed circuit. In addition, the phase modification technique is utilized to enhance the common-mode noise absorption rate and the differential-mode eye diagram in this CMNAC. In the common-mode half circuit (CMHC), the phase inversion of the subnetwork adds a destructive combination of the stopband energy, resulting in higher stopband attenuation. In the differential-mode half circuit (DMHC), the phase linearization leads to flat group delay, reducing the distortion in highspeed digital signal transmission in the lumped circuit. Using a standard integrated passive device (IPD) process, this CMNAC is implemented for the demonstration. The circuit occupies an area of only 1.138 mm × 0.822 mm. From the measured results, the proposed circuit exhibits the common-mode suppression level larger than 15 dB from 4 to 20 GHz and the absorption rate over 90% from 3.8 to 17.4 GHz with a fractional bandwidth 128%. In addition, the measured eye diagram shows that the proposed circuit can support high-speed transmission up to 10 Gb/s.