Monolithic pixel development in TowerJazz 180 nm CMOS for the outer pixel layers in the ATLAS experiment

• Published in: Journal of instrumentation 2018-01, Vol.13 (1), p.C01023-C01023
• Main Authors: Berdalovic, I., Bates, R., Buttar, C., Cardella, R., Plaja, N. Egidos, Hemperek, T., Hiti, B., Hoorne, J.W. van, Kugathasan, T., Mandic, I., Maneuski, D., Tobon, C.A. Marin, Moustakas, K., Musa, L., Pernegger, H., Riedler, P., Riegel, C., Schaefer, D., Schioppa, E.J., Sharma, A., Snoeys, W., Sanchez, C. Solans, Wang, T., Wermes, N.
• Format: Article
• Language: English
• Subjects: Active pixel sensors; Capacitance; CMOS; Depletion; Design modifications; Large Hadron Collider; Luminosity; Noise reduction; Pixels; Radiation tolerance; Sensors; Substrates
• ISSN: 1748-0221; 1748-0221
• DOI: 10.1088/1748-0221/13/01/C01023

The upgrade of the ATLAS tracking detector (ITk) for the High-Luminosity Large Hadron Collider at CERN requires the development of novel radiation hard silicon sensor technologies. Latest developments in CMOS sensor processing offer the possibility of combining high-resistivity substrates with on-chip high-voltage biasing to achieve a large depleted active sensor volume. We have characterised depleted monolithic active pixel sensors (DMAPS), which were produced in a novel modified imaging process implemented in the TowerJazz 180 nm CMOS process in the framework of the monolithic sensor development for the ALICE experiment. Sensors fabricated in this modified process feature full depletion of the sensitive layer, a sensor capacitance of only a few fF and radiation tolerance up to 1015neq/cm2. This paper summarises the measurements of charge collection properties in beam tests and in the laboratory using radioactive sources and edge TCT. The results of these measurements show significantly improved radiation hardness obtained for sensors manufactured using the modified process. This has opened the way to the design of two large scale demonstrators for the ATLAS ITk. To achieve a design compatible with the requirements of the outer pixel layers of the tracker, a charge sensitive front-end taking 500 nA from a 1.8 V supply is combined with a fast digital readout architecture. The low-power front-end with a 25 ns time resolution exploits the low sensor capacitance to reduce noise and analogue power, while the implemented readout architectures minimise power by reducing the digital activity.