A Novel Graph-Coloring-Based Solution for Low-Power Scan Shift

Shifting of test patterns often causes excessive toggle activity which leads to power supply noise and other electrical issues. This article proposes a novel method to assign staggered shift clocks to adjacent logic blocks to reduce the likelihood of excessive switching and prevent power supply nois...

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Bibliographic Details
Published in:IEEE design and test 2020-08, Vol.37 (4), p.14-20
Main Authors: Gupta, Saurabh, Bhaskaran, Bonita, Sarangi, Shantanu, Abdollahian, Ayub, Dworak, Jennifer
Format: Magazinearticle
Language:English
Subjects:
Clocks
Color
Image color analysis
Layout
Noise measurement
Power supplies
Power supply
Switches
System-on-chip
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Summary:Shifting of test patterns often causes excessive toggle activity which leads to power supply noise and other electrical issues. This article proposes a novel method to assign staggered shift clocks to adjacent logic blocks to reduce the likelihood of excessive switching and prevent power supply noise. - Vivek Chickermane, Cadence Design Systems
ISSN:2168-2356
2168-2364
DOI:10.1109/MDAT.2020.2968264