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The Ultimate DataFlow for Ultimate SuperComputers-on-a-Chip, for Scientific Computing, Geo Physics, Complex Mathematics, and Information Processing

This article starts from the assumption that near future 100BTransistor SuperComputers-on-a-Chip will include N big multi-core processors, 1000N small many-core processors, a TPU-like fixed-structure systolic array accelerator for the most frequently used Machine Learning algorithms needed in bandwi...

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Bibliographic Details
Published in:arXiv.org 2021-07
Main Authors: Milutinovic, Veljko, Erfan Sadeqi Azer, Yoshimoto, Kristy, Klimeck, Gerhard, Djordjevic, Miljan, Kotlar, Milos, Bojovic, Miroslav, Miladinovic, Bozidar, Korolija, Nenad, Stankovic, Stevan, Filipović, Nenad, Babovic, Zoran, Kosanic, Miroslav, Tsuda, Akira, Valero, Mateo, De Santo, Massimo, Neuhold, Erich, Skoručak, Jelena, Dipietro, Laura, Ratkovic, Ivan
Format: Article
Language:English
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Summary:This article starts from the assumption that near future 100BTransistor SuperComputers-on-a-Chip will include N big multi-core processors, 1000N small many-core processors, a TPU-like fixed-structure systolic array accelerator for the most frequently used Machine Learning algorithms needed in bandwidth-bound applications and a flexible-structure reprogrammable accelerator for less frequently used Machine Learning algorithms needed in latency-critical applications.
ISSN:2331-8422